Elvedin Memisevic (Former)
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- 2020
-
Mark
Nanowire Tunnel FET with Simultaneously Reduced Subthermionic Subthreshold Swing and Off-Current due to Negative Capacitance and Voltage Pinning Effects
(
- Contribution to journal › Article
-
Mark
Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
(
- Contribution to journal › Article
- 2019
-
Mark
Trap-aware compact modeling and power-performance assessment of III-V tunnel FET
2019) 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An Experimental Study of Heterostructure Tunnel FET Nanowire Arrays : Digital and Analog Figures of Merit from 300K to 10K
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
Impact of Non-idealities on the Performance of InAs/(In)GaAsSb/GaSb Tunnel FETs
2018) In Composants nanoélectroniques(
- Contribution to journal › Article
-
Mark
Effect of Gate Oxide Defects on Tunnel Transistor RF Performance
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Impact of source doping on the performance of vertical InAs/InGaAsSb/GaSb nanowire Tunnel Field-Effect Transistors
(
- Contribution to journal › Article
-
Mark
Fabrication of Tunnel Field-Effect Transistors
2018) Swedish Microwave Days 2018(
- Contribution to conference › Paper, not in proceeding
-
Mark
Projected performance of experimental InAs/GaAsSb/GaSb TFET as millimeter-wave detector
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Capacitance Measurements in Vertical III-V Nanowire TFETs
(
- Contribution to journal › Letter
-
Mark
RF Characterisation of Vertical III-V Nanowire Tunnel FETs
2018) Swedish Microwave Days 2018(
- Contribution to conference › Paper, not in proceeding
-
Mark
Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade
(
- Contribution to journal › Article
- 2017
-
Mark
Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Statistics of InAs/InGaAsSb/GaSb TFETs with sub-50 mV/decade operation at VDS of 0.3V
2017) Compound Semiconductor Week 2017(
- Contribution to conference › Paper, not in proceeding
-
Mark
The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si and InAs/GaAsSb nanowire tunnel FETs
2017) 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017 2017-September. p.273-276(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding