Nano Electronics
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- 2017
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Mark
A transmission line model for co-designed slot-coupled dielectric resonator antennas
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
III-V MOSFETs for High-Frequency and Digital Applications
2017)(
- Thesis › Doctoral thesis (compilation)
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Mark
Individual Defects in InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors Operating below 60 mV/decade
2017) In Nano Letters(
- Contribution to journal › Letter
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Mark
Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
InGaAs tri-gate MOSFETs with record on-current
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Statistics of InAs/InGaAsSb/GaSb TFETs with sub-50 mV/decade operation at VDS of 0.3V
2017) Compound Semiconductor Week 2017(
- Contribution to conference › Paper, not in proceeding
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Mark
Junctionless tri-gate InGaAs MOSFETs
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- Contribution to journal › Article
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Mark
The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si and InAs/GaAsSb nanowire tunnel FETs
2017) 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017 2017-September. p.273-276(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2016
-
Mark
Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si
(
- Contribution to journal › Letter
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Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter