Nano Electronics
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- 2017
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Mark
Record performance for junctionless transistors in InGaAs MOSFETs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with Ion = 330 μa/μm at Ioff = 100 nA/μm and VD = 0.5 v
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Vertical III-V Nanowire Tunnel Field-Effect Transistor
2017)(
- Thesis › Doctoral thesis (compilation)
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Mark
Properties of III-V nanowires : MOSFETs and TunnelFETs
2017) 2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 p.99-100(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
III-V MOSFETs for High-Frequency and Digital Applications
2017)(
- Thesis › Doctoral thesis (compilation)
-
Mark
A transmission line model for co-designed slot-coupled dielectric resonator antennas
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2016
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Mark
Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si
(
- Contribution to journal › Letter
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Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter
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Mark
Autonomy in PhD-education – Supervising for Independence
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2015
-
Mark
III-V Heterostructure Nanowire Tunnel FETs
(
- Contribution to journal › Article