Nano Electronics

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2020
Mark Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU ; Memisevic, Elvedin ^LU ; Zhu, Zhongyunshen ^LU ; Persson, Axel R. ^LU ; Lind, Erik ^LU ; Wallenberg, Lars Reine ^LU and Wernersson, Lars Erik ^LU (2020) In ACS Applied Electronic Materials 2(9). p.2882-2887
- Contribution to journal › Article
Mark Gate-Length Dependence of Vertical GaSb Nanowire p-MOSFETs on Si
Jönsson, Adam ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2020) In IEEE Transactions on Electron Devices 67(10). p.4118-4122
- Contribution to journal › Article
Mark High-Performance Vertical III-V Nanowire MOSFETs on Si with g_m> 3 mS/μm
Kilpi, Olli Pekka ^LU ; Hellenbrand, Markus ^LU ; Svensson, Johannes ^LU ; Persson, Axel R. ^LU ; Wallenberg, Reine ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2020) In IEEE Electron Device Letters 41(8). p.1161-1164
- Contribution to journal › Article
Mark Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving S_min= 32 mV/dec and g_m/I_D= 100 V^-1
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2020) 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 p.17-18
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2019
Mark Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si
Jönsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2019) 64th IEEE International Electron Devices Meeting p.1-39
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark An Experimental Study of Heterostructure Tunnel FET Nanowire Arrays : Digital and Analog Figures of Merit from 300K to 10K
Rosca, T. ; Saeidi, A. ; Memisevic, E. ^LU ; Wernersson, L. E. ^LU and Ionescu, A. M. (2019) 64th Annual IEEE International Electron Devices Meeting, IEDM 2018 2018. p.1-13
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Vertical Gate-All-Around Nanowire GaSb-InAs Core-Shell n-Type Tunnel FETs
Vasen, T. ; Ramvall, P. ^LU ; Afzalian, A. ; Doornbos, G. ; Holland, M. ; Thelander, C. ^LU ; Dick, K. A. ^LU ; Wernersson, L. E. ^LU and Passlack, M. (2019) In Scientific Reports 9(1).
- Contribution to journal › Article
Mark Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy
Borg, Mattias ^LU ; Gignac, Lynne ; Bruley, John ; Malmgren, Andreas ; Sant, Saurabh ; Convertino, Clarissa ; Rossell, Marta D. ; Sousa, Marilyne ; Breslin, Chris and Riel, Heike , et al. (2019) In Nanotechnology 30(8).
- Contribution to journal › Article
Mark Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
Kilpi, Olli Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2019) In IEEE Journal of the Electron Devices Society 7. p.70-75
- Contribution to journal › Article
Mark Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
Hellenbrand, Markus ^LU ; Kilpi, Olli-Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2019) In Microelectronic Engineering
- Contribution to journal › Article

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