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- 2024
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Mark
A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS
(
- Contribution to journal › Article
- 2023
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Mark
On the Calculation and Simulation of Loop Gain in Feedback Circuits
(
- Contribution to journal › Article
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Mark
Some Results on Oscillation Stability in Multi-Mode Harmonic Oscillators
(
- Contribution to journal › Article
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Mark
A Technique to Increase the Linearity of the Bootstrapped Switch
2023) 2023 IEEE 66th International Midwest Symposium on Circuits and Systems, MWSCAS 2023 p.1001-1004(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A High-Speed Comparator Using a New Regeneration Latch
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 1.4 GS/s TI Pipelined-SAR analog-to-digital converter in 22-nm FDSOI CMOS
2023) 9th IEEE Nordic Circuits and Systems Conference, NorCAS 2023 In 2023 IEEE Nordic Circuits and Systems Conference, NorCAS 2023 - Proceedings(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2022
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Mark
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
(
- Contribution to journal › Article
- 2021
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Mark
Harmonic Oscillators in CMOS—A Tutorial Overview
(
- Contribution to journal › Article
- 2020
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Mark
A 19.5-GHz 28-nm Class-C CMOS VCO, with a reasonably rigorous result on 1/f noise upconversion caused by short-channel effects
(
- Contribution to journal › Article
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Mark
A 10-bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration
2020) 2020 IEEE International Symposium on Circuits and Systems (ISCAS)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs
2020) 2020 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO
(
- Contribution to journal › Article
- 2019
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Mark
A 5 GHz CT ^Delta;Σ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS
2019) 5th IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
An Accurate Analysis of Phase Noise in CMOS Ring Oscillators
(
- Contribution to journal › Article
- 2017
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Mark
A 2.8-3.8-GHz Low-Spur DTC-Based DPLL With a Class-D DCO in 65-nm CMOS
(
- Contribution to journal › Article
-
Mark
On the Remarkable Performance of the Series-Resonance CMOS Oscillator
2017) In IEEE Transactions on Circuits and Systems I: Regular Papers(
- Contribution to journal › Article
-
Mark
A general theory of phase noise in transconductor-based harmonic oscillators
(
- Contribution to journal › Article
- 2016
-
Mark
A continuous-time delta-sigma ADC with integrated digital background calibration
(
- Contribution to journal › Article
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Mark
A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
(
- Contribution to journal › Article
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Mark
A 2.2ps 2-D Gated-Vernier Time-to-Digital Converter with Digital Calibration
(
- Contribution to journal › Article
-
Mark
Still More on the 1/f2 Phase Noise Performance of Harmonic Oscillators
(
- Contribution to journal › Article
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Mark
A 2.8-to-5.8 GHz harmonic VCO based on an 8-shaped inductor in a 28 nm UTBB FD-SOI CMOS process
(
- Contribution to journal › Article
-
Mark
A 65 nm CMOS Wideband Radio Receiver with ΔΣ-Based A/D-Converting Channel-Select Filters
(
- Contribution to journal › Article
- 2015
-
Mark
A low-power 2nd-order CT delta-sigma modulator with an asynchronous SAR quantizer
(
- Contribution to journal › Article
-
Mark
A 0.6-3.0 GHz 65 nm CMOS Radio Receiver with DS-based A/D-Converting Channel-Select Filters
2015) IEEE European Solid State Circuits Conference, ESSCIRC 2015(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Digital background calibration in continuous-time delta-sigma analog to digital converters
2015) Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 65nm CMOS fraction-N digital PLL with shaped in-band phase noise
2015) Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers
(
- Contribution to journal › Article
-
Mark
A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
(
- Contribution to journal › Article
-
Mark
A Filtering Delta Sigma ADC for LTE and Beyond
(
- Contribution to journal › Article
-
Mark
A 2.4-to-5.3GHz Dual-Core CMOS VCO with Concentric 8-Shaped Coils
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An 11mW Continuous Time Delta-Sigma Modulator with 20 MHz Bandwidth in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Class-D CMOS DCO with an on-chip LDO
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Lessons from Ten Years of the International Master’s Program in System-on-Chip
2014) The 10th European Workshop on Microelectronics Education (EWME 2014)(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
A Push-Pull Class-C CMOS VCO
(
- Contribution to journal › Article
-
Mark
Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations
(
- Contribution to journal › Article
-
Mark
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
(
- Contribution to journal › Article
-
Mark
A 9MHz Filtering ADC with Additional 2nd-Order Delta-Sigma Modulator Noise Suppression
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Wide Bandwidth Fractional-N Synthesizer for LTE with Phase Noise Cancellation Using a Hybrid- -DAC and Charge Re-timing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Class-D CMOS Oscillators
(
- Contribution to journal › Article
-
Mark
Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs
(
- Contribution to journal › Article
-
Mark
A 2.7-6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2
(
- Contribution to journal › Article
-
Mark
A 90nm CMOS Gated-Ring-Oscillator-Based 2-Dimension Vernier Time-to-Digital Converter
2013) Norchip conference, 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators
(
- Contribution to journal › Article
-
Mark
A 90nm CMOS Digital PLL Based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator
(
- Contribution to journal › Article