Nano Electronics
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- 2017
-
Mark
Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with Ion = 330 μa/μm at Ioff = 100 nA/μm and VD = 0.5 v
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Properties of III-V nanowires : MOSFETs and TunnelFETs
2017) 2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 p.99-100(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Vertical III-V Nanowire Tunnel Field-Effect Transistor
2017)(
- Thesis › Doctoral thesis (compilation)
-
Mark
III-V MOSFETs for High-Frequency and Digital Applications
2017)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Individual Defects in InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors Operating below 60 mV/decade
2017) In Nano Letters(
- Contribution to journal › Letter
-
Mark
Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
InGaAs tri-gate MOSFETs with record on-current
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A transmission line model for co-designed slot-coupled dielectric resonator antennas
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
2017) In IEEE Electron Device Letters(
- Contribution to journal › Letter
-
Mark
InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors
(
- Contribution to journal › Article