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- 2024
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Mark
Cryogenic Ferroelectricity of HZO Capacitors on a III-V Semiconductor
(
- Contribution to journal › Article
- 2023
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Mark
Low-Power, Self-Aligned Vertical InGaAsSb NW PMOS With S < 100 mV/dec
(
- Contribution to journal › Article
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Mark
Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
(
- Contribution to journal › Article
- 2022
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Mark
Integration of Ferroelectric HfxZr1-xO2 on Vertical III-V Nanowire Gate-All-Around FETs on Silicon
(
- Contribution to journal › Article
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Mark
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
(
- Contribution to journal › Article
- 2021
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Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
- 2020
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Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
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Mark
Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon
(
- Contribution to journal › Article
- 2018
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Mark
A Self-aligned Gate-last Process applied to All-III-V CMOS on Si
(
- Contribution to journal › Article
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Mark
Vertical nanowire TFETs with channel diameter down to 10 nm and point S MIN of 35 mV/decade
(
- Contribution to journal › Article
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Mark
Capacitance Measurements in Vertical III-V Nanowire TFETs
(
- Contribution to journal › Letter
- 2017
-
Mark
Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
2017) In IEEE Electron Device Letters(
- Contribution to journal › Letter
-
Mark
Impact of Band-Tails on the Subthreshold Swing of III-V Tunnel Field-Effect Transistor
(
- Contribution to journal › Letter
- 2016
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Mark
High-Performance Lateral Nanowire InGaAs MOSFETs with Improved On-Current
(
- Contribution to journal › Article
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Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter
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Mark
Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si
(
- Contribution to journal › Letter
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Mark
3-D Integrated Track-and-Hold Circuit Using InAs Nanowire MOSFETs and Capacitors
(
- Contribution to journal › Article
- 2014
-
Mark
RF and DC Analysis of Stressed InGaAs MOSFETs
(
- Contribution to specialist publication or newspaper › Specialist publication article
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Mark
High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates
(
- Contribution to journal › Article
-
Mark
In0.53Ga0.47As Multiple-Gate Field-Effect Transistors With Selectively Regrown Channels
(
- Contribution to journal › Article