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- 2024
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Mark
TFET Circuit Configurations Operating below 60 mV/dec
(
- Contribution to journal › Article
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Mark
III-V Devices for Emerging Electronic Applications
2024)(
- Thesis › Doctoral thesis (compilation)
- 2023
-
Mark
Vertical III-V Nanowires For In-Memory Computing
2023)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Geometrical Magnetoresistance as a Tool for Carrier Mobility Extraction in InGaAs MOSFETs
(
- Contribution to journal › Article
- 2022
-
Mark
InGaAs Nanowire and Quantum Well Devices
2022)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
(
- Contribution to journal › Article
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Mark
Lateral III-V Nanowire MOSFETs in Low-Noise Amplifier Stages
(
- Contribution to journal › Article
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Mark
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
(
- Contribution to journal › Article
- 2021
-
Mark
Design of III-V Vertical Nanowire MOSFETs for Near-Unilateral Millimeter-Wave Operation
2021) 15th European Microwave Integrated Circuits Conference, EuMIC 2020 In EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference p.85-88(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
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Mark
Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
2021)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Capacitance Scaling in In0.71Ga0.29As/InP MOSFETs with Self-Aligned a:Si Spacers
(
- Contribution to journal › Article
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
(
- Contribution to journal › Article
-
Mark
Millimeter-Wave Vertical III-V Nanowire MOSFET Device-To-Circuit Co-Design
(
- Contribution to journal › Article
-
Mark
III-V Nanowire MOSFET High-Frequency Technology Platform
2021)(
- Thesis › Doctoral thesis (compilation)
- 2020
-
Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
-
Mark
Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs
(
- Contribution to journal › Article
-
Mark
Electrical Characterisation of III-V Nanowire MOSFETs
2020) In Series of Licentiate and Doctoral Theses(
- Thesis › Doctoral thesis (compilation)
- 2019
-
Mark
Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
(
- Contribution to journal › Article