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- 2024
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Mark
A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS
(
- Contribution to journal › Article
- 2023
-
Mark
Some Results on Oscillation Stability in Multi-Mode Harmonic Oscillators
(
- Contribution to journal › Article
-
Mark
A Technique to Increase the Linearity of the Bootstrapped Switch
2023) 2023 IEEE 66th International Midwest Symposium on Circuits and Systems, MWSCAS 2023 p.1001-1004(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A High-Speed Comparator Using a New Regeneration Latch
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1.4 GS/s TI Pipelined-SAR analog-to-digital converter in 22-nm FDSOI CMOS
2023) 9th IEEE Nordic Circuits and Systems Conference, NorCAS 2023 In 2023 IEEE Nordic Circuits and Systems Conference, NorCAS 2023 - Proceedings(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On the Calculation and Simulation of Loop Gain in Feedback Circuits
(
- Contribution to journal › Article
- 2022
-
Mark
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
(
- Contribution to journal › Article
- 2021
-
Mark
Harmonic Oscillators in CMOS—A Tutorial Overview
(
- Contribution to journal › Article
- 2020
-
Mark
A 19.5-GHz 28-nm Class-C CMOS VCO, with a reasonably rigorous result on 1/f noise upconversion caused by short-channel effects
(
- Contribution to journal › Article
-
Mark
A 10-bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration
2020) 2020 IEEE International Symposium on Circuits and Systems (ISCAS)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs
2020) 2020 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO
(
- Contribution to journal › Article
- 2019
-
Mark
A 5 GHz CT ^Delta;Σ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS
2019) 5th IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
An Accurate Analysis of Phase Noise in CMOS Ring Oscillators
(
- Contribution to journal › Article
- 2017
-
Mark
A general theory of phase noise in transconductor-based harmonic oscillators
(
- Contribution to journal › Article
-
Mark
On the Remarkable Performance of the Series-Resonance CMOS Oscillator
2017) In IEEE Transactions on Circuits and Systems I: Regular Papers(
- Contribution to journal › Article
-
Mark
A 2.8-3.8-GHz Low-Spur DTC-Based DPLL With a Class-D DCO in 65-nm CMOS
(
- Contribution to journal › Article
- 2016
-
Mark
A 2.2ps 2-D Gated-Vernier Time-to-Digital Converter with Digital Calibration
(
- Contribution to journal › Article
-
Mark
A continuous-time delta-sigma ADC with integrated digital background calibration
(
- Contribution to journal › Article
-
Mark
A 2.8-to-5.8 GHz harmonic VCO based on an 8-shaped inductor in a 28 nm UTBB FD-SOI CMOS process
(
- Contribution to journal › Article
-
Mark
A 65 nm CMOS Wideband Radio Receiver with ΔΣ-Based A/D-Converting Channel-Select Filters
(
- Contribution to journal › Article
-
Mark
A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
(
- Contribution to journal › Article
-
Mark
Still More on the 1/f2 Phase Noise Performance of Harmonic Oscillators
(
- Contribution to journal › Article
- 2015
-
Mark
A low-power 2nd-order CT delta-sigma modulator with an asynchronous SAR quantizer
(
- Contribution to journal › Article
-
Mark
A 0.6-3.0 GHz 65 nm CMOS Radio Receiver with DS-based A/D-Converting Channel-Select Filters
2015) IEEE European Solid State Circuits Conference, ESSCIRC 2015(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2.8-to-5.8 GHz harmonic VCO in a 28 nm UTBB FD-SOI CMOS process
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 65nm CMOS fraction-N digital PLL with shaped in-band phase noise
2015) Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Digital background calibration in continuous-time delta-sigma analog to digital converters
2015) Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers
(
- Contribution to journal › Article
-
Mark
A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
(
- Contribution to journal › Article
-
Mark
A 2.4-to-5.3GHz Dual-Core CMOS VCO with Concentric 8-Shaped Coils
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Filtering Delta Sigma ADC for LTE and Beyond
(
- Contribution to journal › Article
-
Mark
An 11mW Continuous Time Delta-Sigma Modulator with 20 MHz Bandwidth in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Lessons from Ten Years of the International Master’s Program in System-on-Chip
2014) The 10th European Workshop on Microelectronics Education (EWME 2014)(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Class-D CMOS DCO with an on-chip LDO
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs
(
- Contribution to journal › Article
-
Mark
Class-D CMOS Oscillators
(
- Contribution to journal › Article
-
Mark
A 2.7-6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2
(
- Contribution to journal › Article
-
Mark
Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations
(
- Contribution to journal › Article
-
Mark
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
(
- Contribution to journal › Article
-
Mark
A Push-Pull Class-C CMOS VCO
(
- Contribution to journal › Article
-
Mark
A 9MHz Filtering ADC with Additional 2nd-Order Delta-Sigma Modulator Noise Suppression
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Wide Bandwidth Fractional-N Synthesizer for LTE with Phase Noise Cancellation Using a Hybrid- -DAC and Charge Re-timing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 90nm CMOS Gated-Ring-Oscillator-Based 2-Dimension Vernier Time-to-Digital Converter
2013) Norchip conference, 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
Introduction to the Special Issue on the 2012 IEEE International Solid-State Circuits Conference
(
- Contribution to journal › Debate/Note/Editorial
-
Mark
A Continuous Time Delta-Sigma Modulator with Reduced Clock Jitter Sensitivity through DSCR Feedback
2012) In Analog Integrated Circuits and Signal Processing(
- Contribution to journal › Article
-
Mark
A 90nm CMOS Digital PLL Based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator
(
- Contribution to journal › Article
-
Mark
An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators
(
- Contribution to journal › Article
-
Mark
A 7.5 mW 9 MHz CT Delta-Sigma Modulator in 65 nm CMOS with 69 dB SNDR and Reduced Sensitivity to Loop Delay Variations
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 3.6mW, 90nm CMOS Gated-Vernier Time-to-Digital Converter with an Equivalent Resolution of 3.2ps
(
- Contribution to journal › Article
-
Mark
A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS
2012) GigaHertz Symposium 2012(
- Contribution to conference › Abstract
- 2011
-
Mark
Time-variant analysis and design of a power efficient ISM-band quadrature receiver
(
- Contribution to journal › Article
-
Mark
A TX VCO for WCDMA/EDGE in 90 nm RF CMOS
(
- Contribution to journal › Article
-
Mark
A 90nm CMOS Gated-Ring-Oscillator-Based Vernier Time-to-Digital Converter with Improved Resolution
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Single-ended low noise multiband LNA with programmable integrated matching and high isolation switches
2011) p.1-4(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A mixed mode design flow for multi GHz ADPLLs
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 9-band WCDMA/EDGE transceiver supporting HSPA evolution
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Highly linear direct conversion receiver using customized on-chip balun
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Digital PLL with a Multi-Delay Coarse-Fine TDC
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A continuous time delta sigma modulator with reduced clock jitter through DSCR feedback
2011) 29th Norchip conference, 2011(
- Contribution to conference › Paper, not in proceeding
- 2010
-
Mark
Low power multi-band CMOS receiver front-end
2010) PRIME 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A High-resolution Vernier Gated-Ring-Oscillator TDC in 90-nm CMOS
2010) NORCHIP Conference, 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Impact of MOS threshold-voltage mismatch in current-steering DACs for CT delta-sigma modulators
(
- Contribution to conference › Paper, not in proceeding
- 2009
-
Mark
A time-variant analysis of fundamental 1/f3 phase noise in CMOS parallel LC-tank quadrature oscillators
(
- Contribution to journal › Article
-
Mark
A compact CMOS MEMS microphone with 66dB SNR
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and design of a low-power single-stage CMOS wireless receiver
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2008
-
Mark
Sensitivity degradation in a tri-band GSM BiCMOS direct-conversion receiver caused by transient substrate heating
(
- Contribution to journal › Article
-
Mark
Analysis and design of a double-quadrature CMOS VCO for subharmonic mixing at Ka-band
(
- Contribution to journal › Article
-
Mark
Comments on "Comments on "A General Theory of Phase Noise in Electrical Oscillators""
(
- Contribution to journal › Letter
-
Mark
Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise
(
- Contribution to journal › Article
-
Mark
A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz
2008) p.474-629(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2007
-
Mark
A 0.35um 50V CMOS sliding-mode control IC for buck converters
2007) p.182-185(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 0.2V, 7.5 uW, 20 kHz Sigma-Delta modulator with 69 dB SNR in 90 nm CMOS
2007) p.206-209(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An analysis of 1/f2 phase noise in bipolar colpitts oscillators (With a digression on bipolar differential-pair LC oscillators)
(
- Contribution to journal › Article
-
Mark
Linearity of bulk-controlled inverter ring VCO in weak and strong inversion
(
- Contribution to journal › Article
-
Mark
A toroidal inductor integrated in a standard CMOS process
(
- Contribution to journal › Article
-
Mark
45% Power Saving in a 0.25um BiCMOS 10Gb/s 50Ohm-Terminated Packaged Active-Load Laser Driver
2007) p.552-553(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop
2007) p.2593-2599(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2006
-
Mark
A time-variant analysis of the 1/f2 phase noise in CMOS parallel LC-tank quadrature oscillators
(
- Contribution to journal › Article
-
Mark
Misconception regarding use of transformer resonators in monolithic oscillators
(
- Contribution to journal › Letter
-
Mark
A novel approach to negative feedback in RX front-ends
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Single-stage low-power quadrature RF receiver front-end: the LMV cell
(
- Contribution to journal › Article
-
Mark
A 2.3GHz LC-tank CMOS VCO with optimal phase noise performance
2006) p.691-700(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
More on the 1/f2 Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators
(
- Contribution to journal › Article
-
Mark
A 0.2V 0.44 uW 20 kHz Analog to Digital Sigma-Delta Modulator with 57 fJ/conversion FoM
2006) p.187-190(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 240W Monolithic Class-D Audio Amplifier Output Stage
2006) p.1346-1355(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO
2006) p.1892-1893(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On the amplitude and phase errors of quadrature LC-tank CMOS oscillators
(
- Contribution to journal › Article
-
Mark
A Programmable 10b up-to-6MS/s SAR-ADC Featuring Constant-FoM with On-Chip Reference Voltage Buffers
2006) p.500-503(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Detailed behavioral modeling of bang-bang phase detectors
2006) p.716-719(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 300 nW, 12 ppm/°C Voltage Reference in a Digital 0.35 um CMOS Process
2006) p.81-82(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
1/f Noise Characterization in CMOS Transistors in 0.13um Technology
2006) p.81-84(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
High-level design flow for all-digital PLLs
2006) p.247-250(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
A study of phase noise in colpitts and LC-tank CMOS oscillators
(
- Contribution to journal › Article
-
Mark
Reduced impact of induced gate noise on inductively degenerated LNAs in deep submicron CMOS technologies
(
- Contribution to journal › Article
-
Mark
Spectrum emission considerations for baseband-modeled CALLUM architectures
(
- Contribution to journal › Article
-
Mark
A low-phase-noise wide-band CMOS quadrature VCO for multi-standard RF front-ends
2005) p.539-542(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Toroidal inductors in CMOS processes
2005) p.293-296(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Time domain analysis of open loop distortion in class D amplifier output stages
2005) paper 4-3.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Numerical effects in time-domain simulations of electronic circuits - a reminder
2005) p.28-31(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Determination of over current protection thresholds for class D audio amplifiers
2005) p.125-128(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Fully integrated 1.7GHz, 188dBc/Hz FoM, 0.8V, 320uW LC-tank VCO and frequency divider
2005) p.244-247(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Technology scaling impact on embedded ADC design for telecom receivers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO
2005) p.391-394(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 0.8V, 7uA, rail-to-rail input/output, constant Gm operational amplifier in standard digital 0.18um CMOS
2005) p.54-57(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Efficient performance simulation of class D amplifier output stages
2005) p.32-35(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Distortion and error reduction in a class D power stage using feedback
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Linearity of bulk-controlled inverter ring VCO in weak and strong inversion
2005) p.145-148(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
Phase noise analysis of the LC-tank CMOS oscillator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On the phase-noise and phase-error performances of multiphase LC CMOS VCOs
(
- Contribution to journal › Article
-
Mark
Implementation of the signal component generator of a CALLUM 2 transmitter architecture in CMOS technology
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Comparison of the image rejection between the passive and the Gilbert mixer
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A phase noise analysis of CMOS colpitts oscillators
2004) p.151-154(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Impact of oscillator power in discrete and continuous time Sigma Delta converters
2004) p.127-130(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A circuit technique improving the image rejection of RF front-ends
2004) p.368-371(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Low-phase-error and low-phase-noise 2GHz CMOS quadrature VCOs
2004) p.155-158(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2003
-
Mark
Highly functional tunnelling devices integrated in 3D
(
- Contribution to journal › Article
-
Mark
Serendipitous noise reduction in inductively degenerated CMOS RF LNAs
2003) p.24-26(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Impact of mutual inductance and parasitic capacitance on the phase-error performance of CMOS quadrature VCOs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2002
-
Mark
Bandwidth considerations for a CALLUM transmitter architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO
2002) 1.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2GHz, 17% tuning range quadrature CMOS VCO with high figure-of-merit and 0.6° phase error
2002) p.815-818(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Circuits and devices with integrated VFETs and RTDs
2002) p.205-208(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and design of a 1.8-GHz CMOS LC quadrature VCO
(
- Contribution to journal › Article
-
Mark
Tail current noise suppression in RF CMOS VCOs
(
- Contribution to journal › Article
-
Mark
On the use of Nauta's transconductor in low-frequency CMOS g(m)-C bandpass filters
(
- Contribution to journal › Article
-
Mark
A 2GHz Low-Phase-Noise CMOS quadrature VCO
2002) p.303-308(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 57-dB image band rejection CMOS GmC polyphase filter with automatic frequency tuning for Bluetooth
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2001
-
Mark
A 2.2 GHz CMOS VCO with inductive degeneration noise suppression
2001) p.197-200(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Very low phase noise RF quadrature oscillator architecture
(
- Contribution to journal › Article
-
Mark
Noise optimization of an inductively degenerated CMOS low noise amplifier
2001) In IEEE Transactions on Circuits and Systems - 2, Analog and Digital Signal Processing 48(9). p.835-841(
- Contribution to journal › Article
-
Mark
A 1.8 GHz CMOS VCO with reduced phase noise
2001) p.121-122(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Phase noise reduction in RF CMOS VCO's via capacitive filtering
2001) p.21-27(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1.8-GHz monolithic CMOS VCO tuned by an inductive varactor
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
A 2.4-GHz CMOS monolithic VCO with an MOS varactor
(
- Contribution to journal › Article
-
Mark
A chip for linearization of RF power amplifiers using predistortion based on a bit-parallel complex multiplier
(
- Contribution to journal › Article
-
Mark
On the use of MOS varactors in RF VCOs
(
- Contribution to journal › Article
-
Mark
A CMOS gm-C polyphase filter with high image band rejection
2000) p.272-275(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A CMOS gm-C IF filter for Bluetooth
2000) p.391-394(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
Reactors - Circuit Theory and Silicon Integrated Applications
1999)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Extension of the Cochrun-Grabel method to allow for mutual inductances
1999) In IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications 46(4). p.481-483(
- Contribution to journal › Article
-
Mark
A digitally controlled shunt capacitor CMOS delay line
(
- Contribution to journal › Article
-
Mark
A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2.4-GHz CMOS monolithic VCO based on an MOS varactor
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 100MHz CMOS gm-C bandpass filter
1999) p.374-377(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1998
-
Mark
Characteristic polynomial and zero polynomial with the Cochrun-Grabel method
(
- Contribution to journal › Article
-
Mark
Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution
(
- Contribution to journal › Article
-
Mark
A Parasitic Insensitive Transconductance-C Bandpass Filter
1998) p.34-41(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A comparison between two 1.8GHz CMOS VCOs tuned by different varactors
1998) p.380-383(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A CMOS current amplifier for biological sensors
1998) p.296-301(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1997
-
Mark
Chip for wideband digital predistortion RF power amplifier linearisation
(
- Contribution to journal › Article
- 1996
-
Mark
MHITIC: 8-channels, 1-ns, Multihit Time-to-Digital Converter CMOS Integrated Circuit
1996) p.76-79(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1995
-
Mark
Custom DSP Design of a GSM Speech Coder
(
- Contribution to journal › Article
- 1993
-
Mark
Custom DSP implementation of a GSM speech coder
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Custom DSP design of a GSM speech coder
1993) European Conference on Design Automation(
- Contribution to conference › Paper, not in proceeding
-
Mark
A GSM speech coder implemented on a customized processor architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding